Extracting Threaded Traces in Simulation Environments - Network and Parallel Computing Access content directly
Conference Papers Year : 2013

Extracting Threaded Traces in Simulation Environments

Abstract

Instruction traces play an important role in analyzing and understanding the behavior of target applications; however, existing tracing tools are built on specific platforms coupled with excessive reliance on compilers and operating systems. In this paper, we propose a precise thread level instruction tracing approach for modern chip multi-processor simulators, which inserts instruction patterns into programs at the beginning of main thread and slave threads. The target threads are identified and captured in a full system simulator using the instruction patterns without any modifications to the compiler and the operating system. We implemented our approach in the GEM5 simulator and evaluations were performed to test the accuracy on x86-Linux using standard benchmarks. We compared our traces to the ones collected by a Pin-tool. Experimental results show that traces extracted by our approach exhibit high similarity to the traces collected by the Pin-tool. Our approaches of extracting traces can be easily applied to other simulators with minor modification to the instruction execution engines.
Fichier principal
Vignette du fichier
978-3-642-40820-5_3_Chapter.pdf (211.77 Ko) Télécharger le fichier
Origin : Files produced by the author(s)
Loading...

Dates and versions

hal-01513764 , version 1 (25-04-2017)

Licence

Attribution

Identifiers

Cite

Weixing Ji, Yi Liu, Yuanhong Huo, Yizhuo Wang, Feng Shi. Extracting Threaded Traces in Simulation Environments. 10th International Conference on Network and Parallel Computing (NPC), Sep 2013, Guiyang, China. pp.27-38, ⟨10.1007/978-3-642-40820-5_3⟩. ⟨hal-01513764⟩
40 View
398 Download

Altmetric

Share

Gmail Facebook X LinkedIn More