An FPGA-Based Real-Time System for 3D Stereo Matching, Combining Absolute Differences and Census with Aggregation and Belief Propagation - VLSI-SoC: At the Crossroads of Emerging Trends Access content directly
Conference Papers Year : 2015

An FPGA-Based Real-Time System for 3D Stereo Matching, Combining Absolute Differences and Census with Aggregation and Belief Propagation

Sotiris Thomas
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  • PersonId : 990387
Apostolos Dollas
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  • PersonId : 990388

Abstract

The implementation of 3D stereo matching in real time is an important problem for many vision applications and algorithms. The current work, extending previous results by the same authors, presents in detail an architecture which combines the methods of Absolute Differences, Census, and Belief Propagation in an integrated architecture suitable for implementation with Field Programmable Gate Array (FPGA) logic. Emphasis on the present work is placed on the justification of dimensioning the system, as well as detailed design and testing information for a fully placed and routed design to process 87 frames per sec (fps) in $$1920 \times 1200$$ resolution, and a fully implemented design for $$400 \times 320$$ which runs up to 1570 fps.
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hal-01380303 , version 1 (12-10-2016)

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Kyprianos Papadimitriou, Sotiris Thomas, Apostolos Dollas. An FPGA-Based Real-Time System for 3D Stereo Matching, Combining Absolute Differences and Census with Aggregation and Belief Propagation. 21th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2013, Istanbul, Turkey. pp.168-187, ⟨10.1007/978-3-319-23799-2_8⟩. ⟨hal-01380303⟩
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